Address Decoding in Memory Devices

(This post explains you about address decoding in Memory Devices)

Sorry Friends, I stared with quite advanced topic, "Address Decoding", and I regret it. Lets see about it.

           Address decoding is an interesting and important topic in Microprocessor designs. Lets start with 8085 processor. It has 16 address lines and it can be addressed maximum of 16KB ranging from 0x0000h to 0xFFFFh. You have 4KB of ROM and 4KB of RAM and you have to connect both these ROM and ROM to 8085. 8085 has 16KB and your memory devices has 8KB (4+4). Now a simple question comes to our mind that, among 16KB of 8085's entire memory, where I can use ROM and RAM and how? if you have studied 5th semester in ECE, you can easily answer this question that "Address Decoding".

          Now we move a bit deeper into it. Lets see the following diagram. Please note that data signals are not shown and data bus also 4-bit wide.

       We have a processor (Lets say Proc.X.) and two memory devices 1 and 2. X has 5 address lines (A4 to A0, A4 is MSB) and it can be addressed from 0x00000b to 0x11111b, maximum of 32 locations. Memories 1 and 2 has 4 address lines both can be addressed from 0x0000b to 0x1111b, maximum of 16 locations. X supports only one CS (Chip select) and it is shared between Memories 1 and 2. X allocated first 16 memory locations to memory-1 and last 16 locations to memory-2. A4 to A0 are shared between both memories and A5 is left unconnected.

        Now we take this example. Lets imagine on address 0x0010b, memory-1 has values of 0x0111b (Lets imagine this is equivalent to Aishwarya Rai's picture) and memory-2 has 0x0000b (Lets imagine this is equivalent to Shakeela's picture). Lets imagine , now X wants to read from address 0x00010b (it expects data 0x0010 from Memory-1) and it does the following things.

• First fetch the address 0x000010b in A4 to A0
• Assert the CS signal low
• Read the data and expects 0x0111b from Memory-1

      But what happens really?? Since Address and Chip select is shares, when X asserts CS signal, it selects both memories. So when X reads from 0x000010b, Mem-1 drives 0x0111b and Mem-2 drives 0x0000 and the resultant data would be obviously 0x0000b!!!! (How? I explain this in another post!). So we came to know that X would get wrong data and lets imagine what would happen if you download a picture of Aishwarya Rai and you see picture of Shakeela when you open it? This is best example of getting wrong data. So what can we do avoid this problem? We can do in two different ways!

1. Drive chip select signal for both memories individually. This is impossible because X supports only one chip select.
2. What the other way do you think?? Yes, the best way is none other than "Address Decoding".

Now look at this modified picture.

  
        In the above diagram, Chip select signals for each memory device is generated (CS1 and CS2) using CS and A4. Now we check out the same scenario we have seen earlier. If X wants to read data from address 0x00010b, the following things happen.

• X fetch address 0x00010b from A4 to A0 and then asserts CS. Now CS1 become '0' and CS2 become '1'.
• Consequently Memory-1 will be selected and Memory-2 would be tri-stated (What is tri-state? We catch this thing in another post?!).
• Finally Memory-1 drives 0x0111b and you would get picture of Aish :-)

     Lets imagine if X wants the data from 0x10010b (means somebody wants Picture of Shakeela), X does the following things.

• Fetches address 0x10010b and then asserts CS. Then CS2 become '0' and CS1 become '1'.
• Consequently Memory-2 is selected and Memory-1 is tri-stated.
• Finally Memory-2 drives 0x0000b in data bus and user get picture of Shakeela :-)

     So now we can say that if X fetches address from 0x00000b to 0x01111b, Memory-1 would be selected and for addresses 0x10000b to 0x11111b, memory-2 would be selected and there would be no any data contention (Data contention is when two devices drives same signal).

     This is the simple way of explaining Address decoding and in next post, we see how can dig deeper in to this topic.

    All valuable comments are welcome.

Best Regards,

Arun Alagarsamy@ arunvasan@gmail.com